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Bell Labs Summer Intern - Processing-in-Memory for physical layer signal processing in communication systems

Pure Research
BLCTO Bell Labs & CTO
1800000QOK Requisition #
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Processing-in-Memory (PIM) architecture is seen as a promising solution to the traditional “memory wall” problem where the memory becomes bottleneck for the processor performance. The main idea behind PIM is to bring the processor logic closer to the memory as much as possible such that the latency in accessing the memory is minimized. Resistive Random-Access Memories (ReRAM) is a novel memory technology that allows to perform the processing (or computation) in the memory element itself thereby pushing the concept of PIM to the most optimal point. Previous work has shown that ReRAMs can efficiently be used to perform matrix vector multiplications for neural network applications, where the accuracy requirements are not very stringent. The goal of this internship is to evaluate the potential of PIM architecture using ReRAM for signal processing applications in the physical layer of communication systems, where accuracy requirements are high.


You will join the team of Hardware Platforms research group in Bell Labs, working on the realization of strategic digital hardware building blocks for communication systems. The Hardware platforms group, as part of the world-leading Nokia Bell Labs research center, groups experts around the globe and acts as centralized research group for the entire Bell Labs community.

Key Responsibilities:

·         Develop a mixed-signal model for the PIM architecture for signal processing operation in the physical layer using existing ReRAM models from the literature.

·         Validate the model and perform extensive simulations and compare with the state-of-the art processing architecture in terms of performance and power consumption.

·         Identify the bottlenecks in the PIM architecture using ReRAMs and propose novel solutions.


·         Enrolled student in Master of Electrical Engineering or relevant related area

·         Experience with digital/mixed-signal design, simulation tools such as Cadence/Virtuso AMS tools

·         Knowledge of digital/mixed-design, processor architectures, memory systems

·         Experience with hardware description languages (e.g. VHDL, Verilog) and scripting languages (e.g. Python, TCL) is be a plus.

Added value for the candidate:

·         Make contact in the innovation center, Nokia Bell Labs.

·         Familiarize yourself with the process to develop innovative new products intended to reach the public in 5-10 years from now.

·         Get the opportunity for in-depth understanding of state-of-the-art communications systems.


Contact Person: manil_dev.gomony@nokia-bell-labs.com

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